Tuesday, 2 October 2012

Fermi-FET technology




Transistor scaling, a major driving force in the industry for decades, has been responsible for the dramatic increase in circuit complexity. Shorter gate lengths have required lower drain voltages and concurrently lower threshold voltages. Recent CMOS evolution has seen a dramatic reduction in operating voltage as transistor size is reduced. This was due to the maximum field limit on the gate oxide needed to maintain good long-term reliability. Proper selection of the gate material can produce low threshold transistors with off-state performance parameters equivalent to high threshold devices.

                The Buried Channel Accumulation device, currently being used for p-type transistor processes has the Fermi level at a considerable depth from the gate thereby making it difficult to shut the device off. Attempts to bring the Fermi level up result in severe degradation of device performance. Need for optimization of existing BCA technology arose and Thunderbird Technologies, Inc. delivered! The ‘incredible’: Fermi-FET. 

                The   Fermi-FET technology brings the Fermi level nearer to the gate. This technology merges the mobility and low drain current leakage of BCA devices as well as the higher short channel effect immunity of SCI devices. This paper highlights aspects of the technology in a non-mathematical presentation to give a sound general understanding of why the technology is the most promising avenue for advanced very short devices.                                            

                Fermi-FET technology can lead to significant improvement in circuit performance, layout density, power requirements, and manufacturing cost with only a moderate alteration of traditional MOSFET manufacturing technology. This technology makes use of a subtle optimization of traditional buried channel technology to overcome the known shortcomings of buried channel while maintaining large improvements in channel mobility.

                Fermi-FET can optimize both the N-Channel and P-Channel devices with a single gate material, provided the work function is near the mid-range between N and P-type polysilicon. Materials that have been used in MOSFET technology with a suitable work function include Tungsten, Tungsten Silicide, Nickel, Cobalt, Cobalt Silicide, P-type Ge:Si and many others. There is about a 30% reduction in junction capacitance relative to traditional MOSFET devices. This fact alone gives a significant speed advantage to the Fermi-FET in large scale circuits. The total speed improvement produced by both the lowered threshold and lowered gate and junction capacitances is very substantial.

                 In order to illustrate the impact of lowered threshold voltages via work function engineering, the large-signal transient response of two inverter structures was simulated. A comparison of conventional CMOS and metal-gate Fermi-FET structures was performed. It is seen that the Fermi-FET inverter displays significantly improved rise and fall times compared to the MOSFET. The different delay characteristics are evident. It is seen that the Fermi-FET inverter displays significantly improved rise and fall times compared to the MOSFET
.
                The individual device DC characteristics were already well-known from the device simulations. For each inverter, the supply voltage was ramped up to Vd with a delay sufficient to allow the circuit nodes to settle to their initial DC state with the input low. The input was then pulsed high, then low; again with a delay time long enough to guarantee all nodes reach steady state. The corresponding outputs obtained give a comprehensive view of the device performance as compared to the traditional technology and thus acts a primary assessment of the feasibility of the new technology in lieu of existing ones.

                The output of the mixed-mode simulations is shown in the figure. Even at 0.4 mm gate length the low threshold Fermi-FET is almost twice as fast as the MOSFET in this simple circuit.

                Simple circuits such as this underestimate the benefit of the lowered capacitance associated with the source/drain junctions, but they virtually ignore the capacitance associated with the extended wiring in large circuits. The Fermi-FET is the emerging technology in the ever-expanding empire of electronics circuits and devices and is slated to be crowned the king in foreseeable future. 



If you need full seminar report on any one of above topic, please mention the topic at below comment box